1. Field of the Invention
The present invention relates to a pattern formation method for a semiconductor device such as a thin film transistor and a method of manufacturing a display using the pattern formation method, particularly relates to a pattern formation method using technique for reflowing resist and a method of manufacturing a thin film transistor for a display using the pattern formation method.
2. Description of the Prior Art
The advanced integration of a semiconductor device has been achieved by photolithography which is a means for forming a minute pattern and dry etching technique. However, when the performance of a semiconductor device is enhanced as described above, the manufacturing process is advanced and the manufacturing cost is increased.
Then recently, it is demanded to integrate pattern manufacturing processes and to reduce the number of total processes by (1) tapering a wiring pattern which is one of means for making the contents of a process satisfactory and (2) greatly reducing the manufacturing cost of a semiconductor device.
A case that normal wiring is formed instead of tapered wiring (hereinafter called a first conventional example) and a case that wiring in a well-known example is formed (hereinafter called a second conventional example) out of prior art will be described referring to drawings below.
FIGS. 25A to 25D are schematic sectional views showing wiring pattern for explaining the first conventional example n the order of the manufacturing processes.
As shown in FIG.25A, a metallic film 402 made of an aluminum alloy and others is formed on base material 401 such as a glass substrate. The thickness of the metallic film 402 is approximately 1 xcexcm. A resist mask 407 is formed in a predetermined region on the metallic film 402 by well-known photolithography.
Next, as shown in FIG. 25B, the resist mask 407 functions as a mask for etching, first etching is applied to the metallic film 402 and a first tapered layer 415 is formed.
Next, as shown in FIG. 25C, the resist mask 407 reflows by heating the whole at 150 to 200xc2x0 C. and hangs sideways to be a thermally reflowed resist mask 413.
Next, as shown in FIG. 25D, second etching is applied to the residual metallic film 402 using the thermally reflowed resist mask 413 as an etching mask and wiring 411 having a second tapered layer 416 in the lower part is formed.
FIGS. 26A to 26C are schematic sectional views showing the manufacturing method of the second conventional example (Japanese published unexamined patent application No. 2000-133636) in the order of manufacturing processes.
As shown in FIG. 26A, a metallic film 422 made of an aluminum alloy and others is formed on base material 421. The thickness of the metallic film 422 is approximately 1 xcexcm. A resist mask 427 is formed in a predetermined region on the metallic film 422 by well-known photolithography.
Next, as shown in FIG. 26B, the resist mask 427 functions s a mask for etching, first etching is applied to the metallic film 422 and a first tapered layer 435 is formed.
Next, after the first tapered layer 435 shown in FIG. 26B formed, the resist mask 427 is dipped in organic silane solution which is a sililation reagent together with the base material 421. Or the resist mask 427 is exposed to the vapor of organic silane. As described above, the resist mask 427 is sililated.
The resist mask 427 swells by the sililation and as shown in FIG. 26C, the swollen sililated resist mask 433 is formed. The pattern width of the sililated resist mask 433 swollen by the sililation is increased than the pattern width of the resist mask 427 shown by a broken line. For the sililation reagent, silazane and others are used.
Next, second etching is applied to the residual metallic film 422 using the swollen sililated resist mask 433 as an etching mask and wiring 431 having a second tapered layer 436 in the lower part is formed. However, as the adhesion strength of the swollen sililated resist mask 433 is weak, the first tapered layer 435 is etched from the side and a side-etched part 432 in a crooked shape may be formed in the first tapered layer 435. As a result, the wiring 431 is formed.
A present case of the formation of wiring for which the reduction of the number of manufacturing processes is demanded (hereinafter called a third conventional example) and a case of the formation of wiring in which the number of the manufacturing processes is reduced according to the demand (hereinafter called a fourth conventional example) out of the prior art will be described referring to drawings below.
FIGS. 27A to 27C are schematic sectional views showing the manufacturing process of a part of reverse staggered-type TFT for explaining the third conventional example.
As shown in FIG. 27A, a gate electrode 442 is formed on base material 441 formed by a transparent substrate made of glass and others, a gate insulating film 443, an amorphous silicon (a-Si) film 444, an N+-type amorphous silicon (N+-type a-Si) film 455 and a metallic film 446 are laminated and further, first resist masks 447 and 448 are formed on the metallic film 446 by well-known photolithography.
Next, as shown in FIG. 27B, the metallic film 446 and the N+-type a-Si film 445 are dry-etched using these first resist masks 447 and 448 as an etching mask.
As a result, a source electrode 451, an ohmic contact layer for the source electrode 449, a drain electrode 452 and an ohmic contact layer for the drain electrode 450 are formed. Afterward, the resist masks 447 and 448 first formed are peeled and removed.
Next, as shown in FIG. 27C, the source electrode 451, the ohmic contact layer 449, the drain electrode 452 and the ohmic contact layer 450 are coated, a part of the surface of the a-Si film 444 is coated and a second resist mask 453 is formed by well-known photolithography.
Next, the a-Si film 444 is etched using the second resist mask 453 as an etching mask and an island layer 454 is formed. The second resist mask 453 is peeled and removed.
As a result, reverse staggered-type TFT is formed. The description of the succeeding processes is omitted, however, for example, a pixel electrode, a passivation insulating film and others are formed and an active matrix TFT-LCD device is formed.
FIGS. 28A to 28C are schematic sectional views showing the manufacturing process of a part of reverse staggered-type TFT for explaining the fourth conventional example disclosed in Japanese published unexamined patent application No. 2000-133636. FIG. 28A is similar to FIGS. 27A and 27B related to the third conventional example.
Next, resist masks 467 and 468 are dipped in the solution of organic silane. Or they are exposed to the vapor of organic silane. As a result, the resist masks 467 and 468 are sililated. The resist masks 467 and 468 are swollen by the sililation and as shown in FIG. 28B, they are united to be one swollen sililated resist mask 473. In the swelling in this case, the dimension of the resist masks 467 and 468 respectively shown by a broken line is respectively swollen by the volume of 0.1 to 2.0 xcexcm
Next, second etching is applied using the swollen sililated resist mask 473 as an etching mask and an a-Si film 464 is etched.
As a result, as shown in FIG. 28C, an island layer 471 is formed. Afterward, the swollen sililated resist mask 473 is peeled and removed.
As a result, reverse staggered-type TFT is formed. The description of the succeeding processes is omitted, however, for example, a pixel electrode, a passivation insulating film and others are formed and active matrix TFT-LCD device is formed.
FIGS. 29A to 29C are schematic sectional views showing the manufacturing process of a part of reverse staggered-type TFT for explaining a fifth conventional example disclosed in Japanese published unexamined patent application No. 2000-131719. FIG. 29A is similar to FIGS. 27A and 27B related to the third conventional example.
Next, resist masks 487 and 488 reflow by heating the whole at 150 to 250 xc2x0 C. as in the first conventional example and hang sideways to be thermally reflowed resist masks 493 and 494. In this case, the resist masks can be united by extending processing time in case distance L between channels is up to 0.1 to 2.0 xcexcm, however, as the viscosity of reflowing is high, which is a defect of thermal reflowing, the thermally reflowed resist masks respectively have the wavy uneven end, the unity of the resists is often incomplete and further, as thermal reflowing itself in case the distance between the channels exceeds 2.0 xcexcm is mostly impossible even by greatly extending processing time, the thermally reflowed resist masks 493 and 494 may not be completely united as shown in FIG. 29B. When an a-Si film 484 under the resist masks is etched in a state that the unity of the resist masks is insufficient and adhesion between each resist mask and the film under it is unsatisfactory, a united island layer is not formed as shown in FIG. 29C to be isolated island layers 495 and 496 and a TFT channel is not normally formed.
As described above, reverse staggered-type TFT is formed. The description of the succeeding processes is omitted, however, for example, a pixel electrode, a passivation insulating film and others are formed and active matrix TFT-LCD device is formed, however, the distance L between channels which can form TFT elements by thermal reflowing in the fifth conventional example is limited to 0.1 to 2.0 xcexcm or less. 
In the case of the first conventional example shown in FIGS. 25A to 25D that the wiring pattern is tapered out of the above-described prior art, the volume is reduced because the evaporation of components inside the resist is also accelerated in the thermal reflowing of the resist mask 407. As the swelling of the dimension in the lateral direction of the resist mask 407 is approximately 0.5 to 2.0 xcexcm and in addition, the viscosity of thermal reflowing is high, the end of the resist mask is wavy and uneven, side etching often occurs and wiring has an insufficiently tapered shape, that is, the cross section of wiring is often perpendicular or partly reversely tapered.
The above-mentioned second conventional example was proposed to solve a defect in the first conventional example by utilizing the swelling of the volume of the resist. In that respect, large effect is acquired. However, these inventors found a phenomenon that when the resist mask is swollen too much, adhesion strength between the swollen resist and the film under it (the etched film) is reduced and as a result, side etching may occur by further experiments. In the experiments, a result that no problem occurs even if the resist is expanded laterally up to 0.1 to 2.0 xcexcm utilizing the swelling of the volume is acquired and no problem occurs in a normal range, however, when the resist is further expanded, the above-mentioned problems are required to be considered.
Next, the third conventional example shown in FIGS. 27A to 27C for reducing the number of manufacturing processes out of the prior art has a problem that two photolithographic processes are required to form the source electrode 451, the ohmic contact layer for the source electrode 449, the drain electrode 452 and the ohmic contact layer for the drain electrode 450 and to form the island layer 454 in the manufacture of the staggered-type TFT.
The above-mentioned fourth conventional example also utilizes the same principle as in the first conventional example and has a problem that the fourth conventional example is enabled only if an interval between the source electrode and the drain electrode of a TFT device is 0.1 to 2.0 xcexcm or less and when the interval is 4 xcexcm or more, the unity of the resist masks is practically difficult because of the above-mentioned reason.
The above-mentioned fifth conventional example also utilizes the same principle as in the second conventional example, in the fifth conventional example, the unity is enabled by extending processing time in case distance between channels is 0.1 to 2.0 xcexcm, however, as the viscosity of thermal reflowing is high, which is a defect of thermal reflowing, the end is wavy and uneven, the unity of the resists is also often incomplete and further, as thermal reflowing itself in case the distance between channels exceeds 2.0 xcexcm is mostly impossible even if processing time is greatly extended, a case that the resists are not completely united may occur. As the unity of the resist masks is insufficient and adhesion between each resist mask and the film under it is unsatisfactory, the united island layer is not formed, isolated island layers are formed and the TFT channel is not normally formed.
Therefore, there is a problem that the distance between channels which can form TFT elements by thermal reflowing in the fifth conventional example is limited to 0.1 to 2.0 xcexcm or less and in addition, the TFT elements are often incomplete.
An object of the invention is to provide a method of forming a pattern of a semiconductor device wherein patterns different in size which heretofore require two processes can be formed in one process.
To achieve the object, in the invention, a chemical for fusing resist is infiltrated into the resist, the resist is fused by the chemical and is reflowed (called reflowing by a chemical).
That is, in the pattern formation method of forming a desired pattern using processing for etching a film, after a resist film is formed on the etched film, the resist film is patterned so that it is a first mask, next, the film to be etched is etched using the first mask and next, after the first mask is reflowed by a chemical and a second mask is formed, etching is continued using the second mask.
In this case, the whole one layer is etched by first etching, a different layer under it may be also etched by second etching or one layer is etched up to the halfway by first etching and the rest may be also etched by second etching.
The above-described problems are solved by the above-mentioned method. That is, in the second conventional example, as only the swelling of the volume of resist is utilized, a problem of the adhesion strength between the resist and the etched layer occurs and in the invention, as reflowing is utilized, the problem of the second conventional example is solved.
The pattern formation method according to the invention includes a process for forming an organic film having a predetermined pattern on an etched film, a process for removing a part of the etched film from the surface using the organic film as a mask so that the etched film has an exposed region and a coated region coated with the organic film, a process for transforming and extending the organic film up to the exposed region and a process for etching the exposed region of the etched film using the transformed organic film as a mask and has a basic concept that the process for forming the transformed organic film is executed by reflowing by infiltrating the solution of an organic solvent into the organic film and fusing the organic film. The pattern formation method having the basic concept of the invention is embodied in the following various embodiments.
First, in the process for forming an organic film, adjacent organic films adjacent to each other are formed, in the process for forming a transformed organic film, the adjacent organic films respectively become an adjacent transformed organic film and are united.
Between the process for forming the transformed organic film and the process for etching the exposed region of the etched film, the process for removing a part of a transformed organic film is included and is executed by reducing the area of the transformed organic film by ashing by applying oxygen to the transformed organic film or ozone processing using ultraviolet radiation.
Processes from the process for forming the transformed organic film to the process for etching the exposed region of the etched film are repeated at least once after the process for etching the exposed region of the etched film.
Out of the etching of the etched film, at least the last etching is wet etching.
The solution of an organic solvent includes at least one of the following organic solvents.
Organic solvents (R: alkyl group or substitutional alkyl group, Ar: phenyl radical or aromatic nucleus except phenyl radical)
Alcohols (Rxe2x80x94OH)
Alkoxy alcohols
Ethers (Rxe2x80x94Oxe2x80x94R, Arxe2x80x94Oxe2x80x94R, Arxe2x80x94Oxe2x80x94Ar)
Esters
Ketones
Glycols
Alkylene glycols
Glycol ethers
Reflowing is executed by exposing to the vapor of the solution of the organic solvent or by dipping in the solution of the organic solvent.
The organic film is composed of plural organic films different in the thickness, when the organic film is a photosensitive organic film, the plural organic films different in the thickness are acquired by varying the quantity of exposure to the photosensitive organic film, concretely, between the process for forming the organic film by plural organic films different in the thickness and removing a part of the etched film from the surface using the organic film as a mask so that the etched film has an exposed region and a coated region coated with the organic film and the process for transforming the organic film and extending it to the exposed region, a process for removing the relatively thinner organic film out of the plural organic films different in the thickness forming the organic film by etching the organic film and leaving the organic film thicker than the relatively thinner organic film is included and further concretely, between the process for removing apart of the etched film from the surface using the organic film as a mask so that the etched film has the exposed region and the coated region coated with the organic film and the process for transforming the organic film and extending it to the exposed region, a process for removing an altered layer of the surface of the organic film is included. Further, the process for removing the altered layer of the surface of the organic film is executed by processing the organic film by plasma processing or UV ozone processing, the plasma processing is executed using any of plasma processing gas including O2 gas, plasma processing gas including fluorine gas and plasma processing gas including mixed gas of O2 gas and fluorine gas, when plasma processing gas including fluorine gas is used, it includes any of SF6, CF4 and CHF3 and when plasma processing gas including mixed gas of O2 gas and fluorine gas is used, it includes any of SF6/O2, CF4/O2 and CHF3/O2.
Between the process for removing a part of the etched film from the surface using the organic film as a mask so that the etched film has an exposed region and a coated region coated with the organic film and the process for transforming the organic film and extending it to the exposed region, a process for dipping the etched film and the organic film in the solution of hydrofluoric acid is included.
The etched film is composed of a first film and a second film in order from the bottom, the second film is etched and removed using the organic film as a mask, the first film is etched and removed using the transformed organic film as a mask, the first film is a first metallic film, the second film is a second metallic film made of material different from that of the first metallic film. Or the first film is a silicon film and the second film is a silicon film for an ohmic contact including high-density impurities and a metallic film in order from the bottom. Or the first film is a silicon film and a silicon film for an ohmic contact including high-density impurities in order from the bottom and the second film is a metallic film. In the latter two cases, the silicon film forms a semiconductor layer of a thin film transistor, and the silicon film for the ohmic contact and the metallic film form a source electrode and drain electrode of the thin film transistor. When the organic film is composed of plural organic films different in the thickness, the organic film is composed of a thicker organic film formed thickly on the side of a channel of the semiconductor layer and a thinner organic film formed thinly on the side apart from the channel of the semiconductor layer, after the source electrode and the drain electrode of the thin film transistor are formed, the organic film is etched from the surface, only the thicker organic film is left on the source electrode and the drain electrode and the thicker organic film is transformed to be a transformed organic film.
For the organic film in the pattern formation method according to the invention, a photoresist film is suitable.
The pattern formation method according to the invention is suitable for the process of an active matrix such as TFT which forms a display such as a liquid crystal display and an EL display.
That is, the manufacturing method of TFT for a display including a process for forming a gate electrode on a substrate, a process for sequentially forming a gate insulating film, a semiconductor layer and a metallic layer so that they cover the gate electrode, a process for patterning the metallic layer and forming a mask for forming a source electrode and drain electrode, a process for infiltrating an organic solvent in the mask after the metallic layer is patterned, reflowing the mask and connecting the mask between the source electrode and the drain electrode and a process for patterning the semiconductor layer using the connected mask acquired in the process for connecting the mask is acquired.
The manufacturing method of TFT for a display further includes a process for forming an ohmic layer between the metallic layer and the semiconductor layer, and the ohmic layer is also patterned in the process for patterning the metallic layer.
Also, the manufacturing method of TFT for a display includes the process for forming the ohmic layer between the metallic layer and the semiconductor layer and is characterized in that the ohmic layer is also patterned in the process for patterning the semiconductor layer and after the connected mask is removed, the ohmic layer is patterned using the source electrode and the drain electrode as a mask.
Furthermore, the manufacturing method of TFT for a display is characterized in that it includes a process for also forming a common electrode on a substrate when the gate electrode is formed and further, includes a process for sequentially forming a gate insulating film, a semiconductor layer and a metallic layer so that they cover the common electrode in a process for sequentially forming the gate insulating film, the semiconductor layer and the metallic layer and forming a pixel electrode located over the common electrode in a process for patterning the metallic layer and forming a source electrode and a drain electrode.
The manufacturing method is characterized in that masks adjacent so that they respectively correspond to a source electrode and a drain electrode have a thin film region in which the masks are thinner on the far side than the thickness on the adjacent sides.
A case that the pattern formation method according to the invention is applied to a liquid crystal display will be described below.
The manufacturing method of a first liquid crystal display according to the invention is characterized in that TFT is formed by the manufacturing method including a process for forming gate. wiring and a gate electrode on a first substrate and next, forming a gate insulating film for covering the gate wiring and the gate electrode on the first substrate, a process for depositing a semiconductor film, a semiconductor film for an ohmic contact and a metallic film for a source and a drain on the gate insulating film in order from the bottom, a process for forming a resist mask for the source electrode and a resist mask for the drain electrode respectively located over the gate electrode on the metallic film for the source and the drain, a process for etching the metallic film for the source and the drain and the semiconductor film for an ohmic contact using the resist mask for the source electrode and the resist mask for the drain electrode as a mask and forming a laminated pattern composed of the semiconductor film for an ohmic contact and the metallic film for the source and the drain, a process for connecting the resist mask for the source electrode and the resist mask for the drain electrode by reflowing the resist mask for the source electrode and the resist mask for the drain electrode sideways and covering at least a part of the laminated pattern with a connected resist mask and a process for etching the semiconductor film using the connected resist mask as a mask and forming a semiconductor island, next, opposite substrates are formed by arranging a second substrate opposite to the first substrate on the side of the semiconductor island of the first substrate, and further, a liquid crystal composition is filled between TFT and the opposite substrate. The manufacturing method is also characterized in that the process for forming the connected resist mask is executed by infiltrating the solution of an organic solvent into the resist mask for the source electrode and the resist mask for the drain electrode and reflowing the resist mask for the source electrode and the resist mask for the drain electrode.
Next, the manufacturing method of a second liquid crystal display according to the invention is characterized in that TFT is formed by a manufacturing method including a process for forming gate wiring and a gate electrode on a first substrate and next, forming a gate insulating film for covering the gate wiring and the gate electrode on the first substrate, a process for depositing a semiconductor film, a semiconductor film for an ohmic contact and a metallic film for a source and a drain on the gate insulating film in order from the bottom, a process for forming a resist mask for a source electrode and a resist mask for a drain electrode respectively located over the gate electrode on the metallic film for the source and the drain, a process for etching the metallic film for the source and the drain using the resist mask for the source electrode and the resist mask for the drain electrode as a mask and forming a metallic film pattern for the source electrode and a metallic film pattern for the drain electrode, a process for connecting the resist mask for the source electrode and the resist mask for the drain electrode by reflowing the resist mask for the source electrode and the resist mask for the drain electrode sideways and covering at least a part of the metallic film pattern for the source electrode and the metallic film pattern for the drain electrode with a connected resist mask, a process for etching the semiconductor film for an ohmic contact and the semiconductor film using the connected resist mask as a mask and forming a semiconductor film laminated island, a process for etching the semiconductor film for an ohmic contact of the semiconductor film laminated island using the metallic film pattern for the source electrode and the metallic film pattern for the drain electrode as a mask after the connected resist mask is peeled, forming a laminated pattern composed of the semiconductor film for an ohmic contact and the metallic film for the source and the drain and forming a semiconductor island composed of the semiconductor film, next, a second substrate opposite to the first substrate is arranged on the side of the semiconductor island of the first substrate, and further, a liquid crystal composition is filled between TFT and the opposite substrate. The manufacturing method is also characterized in that the process for forming the connected resist mask is executed by infiltrating the solution of an organic solvent into the resist mask for the source electrode and the resist mask for the drain electrode and reflowing the resist mask for the source electrode and the resist mask for the drain electrode.
Next, the manufacturing method of a third liquid crystal display according to the invention is characterized in that TFT is formed by a manufacturing method including a process for forming gate wiring and a comb-type common electrode on a first substrate and next, forming a gate insulating film for covering the gate wiring and the common electrode on the first substrate, a process for depositing a semiconductor film, a semiconductor film for an ohmic contact and a metallic film for a source and a drain on the gate insulating film in order from the bottom, a process for forming a resist mask for a source electrode and a resist mask for a drain electrode respectively located over the gate wiring on the metallic film for the source and the drain and forming a resist mask for a pixel electrode so that an electrode is formed between comb-type electrodes of the common electrode, a process for etching the metallic film for the source and the drain and the semiconductor film for an ohmic contact using the resist mask for the source electrode, the resist mask for the drain electrode and the resist mask for a pixel electrode as a mask, forming a source electrode laminated pattern composed of the semiconductor film for an ohmic contact and the metallic film for the source and the drain, a drain electrode laminated pattern and a pixel electrode laminated pattern and forming the pixel electrode laminated pattern so that at least comb-type electrodes of the pixel electrode laminated pattern are respectively put between the comb-type electrodes of the common electrode, a process for connecting at least the resist mask for the source electrode and the resist mask for the drain electrode by reflowing the resist mask for the source electrode, the resist mask for the drain electrode and the resist mask for a pixel electrode sideways and covering at least a part of the laminated pattern with a connected resist mask, a process for etching the semiconductor film using the connected resist mask as a mask and forming a semiconductor island, next, a second substrate opposite to the first substrate is arranged on the side of the semiconductor island of the first substrate, and further, a liquid crystal composition is filled between TFT and the opposite substrate. The manufacturing method is also characterized in that the process for forming the connected resist mask is executed by infiltrating the solution of an organic solvent into the resist mask for the source electrode and the resist mask for the drain electrode and reflowing the resist mask for the source electrode, the resist mask for the drain electrode and the resist mask for a pixel electrode.
In the manufacturing methods of the first, second and third liquid crystal displays according to the invention, the process for forming the resist mask for the source electrode and the resist mask for the drain electrode is executed by forming a thicker resist mask on the side on which the resist mask for the source electrode and the resist mask for the drain electrode are opposite on the metallic film for the source and the drain and forming a thinner resist mask thinner than the thicker resist mask on the side on which the resist mask for the source electrode and the resist mask for the drain electrode mutually separate, the process for forming the connected resist mask is executed by reflowing the thicker resist mask and the thinner resist mask, the expansion in the lateral direction of the connected resist mask is large in the vicinity of a channel region between the resist mask for the source electrode and the resist mask for the drain electrode, the expansion in the lateral direction of the connected resist mask is gradually reduced as the connected resist mask separates from the channel region, a process for etching the resist mask for the source electrode and the resist mask for the drain electrode, removing only the thinner resist mask and leaving at least the thicker resist mask is included immediately before the process for forming the connected resist mask between the process for forming the resist mask for the source electrode and the resist mask for the drain electrode and the process for forming the connected resist mask, and the process for forming the connected resist mask is executed by reflowing the left resist mask and forming the connected resist mask. Further, these connected resist masks are formed in a shape such as each connected resist mask covers at least the channel region between the resist mask for the source electrode and the resist mask for the drain electrode.
Also, in the manufacturing methods of the first, second and third liquid crystal displays according to the invention, after the process for forming the semiconductor island, a process for forming a passivation insulating film for covering the a laminated pattern and the semiconductor island on the gate insulating film, a process for piercing the passivation insulating film and the gate insulating film on the gate wiring, piercing the passivation insulating film on the laminated pattern and respectively forming a contact hole for the gate wiring and a contact hole for the source and the drain and a process for forming gate wiring terminal electrode and an upper electrode for the source and the drain respectively connected to the gate wiring and the laminated pattern on the passivation insulating film via the contact hole for the gate wiring and the contact hole for the source and the drain continue.
Also, in the manufacturing methods of the first, second and third liquid crystal displays according to the invention, the gate metallic film and the metallic film for the source and the drain respectively forming the gate wiring and the gate electrode are any of the following metallic films.
ITO film
Indium-tin alloy
One-layer structure made of aluminum or aluminum alloy
One-layer structure made of chromium or chromium alloy
Two-layer structure composed of one layer made of aluminum or aluminum alloy and other layer made of chromium or chromium alloy
Two-layer structure composed of one layer made of aluminum or aluminum alloy and other layer made of titanium or titanium alloy
Two-layer structure composed of one layer made of aluminum or aluminum alloy and other layer made of titanium nitride or titanium nitride alloy
Two-layer structure composed of one layer made of aluminum or aluminum alloy and other layer made of molybdenum or molybdenum alloy
Two-layer structure composed of one layer made of chromium or chromium alloy and other layer made of molybdenum or molybdenum alloy
Three-layer structure composed of first and third layers made of chromium or chromium alloy and second layer made of aluminum or aluminum alloy
Three-layer structure composed of first and third layers made of molybdenum or molybdenum alloy and second layer made of aluminum or aluminum alloy
Three-layer structure made of aluminum or aluminum alloy, molybdenum or molybdenum alloy and chromium or chromium alloy
Three-layer structure made of aluminum or aluminum alloy, molybdenum or molybdenum alloy and titanium or titanium alloy
Three-layer structure made of aluminum or aluminum alloy, titanium nitride or titanium nitride alloy and titanium or titanium alloy